Superjunction transistor device and method for forming a superjunction transistor device
US12034040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2021 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Nov 15, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a drift region of a superjunction transistor and a superjunction transistor device are disclosed. The method includes forming first regions of a first doping type and second regions of a second type in a semiconductor body such that the first and second regions are arranged alternatingly in the body. The first and second regions are formed by: forming trenches in at least one semiconductor layer; implanting first type dopant atoms and second type dopant atoms into opposing sidewalls of the trenches; filling the trenches with a semiconductor material; and diffusing the dopant atoms in a thermal process so that the first type dopant atoms form the first regions and the second type dopant atoms form the second regions. Each trench has a first width, the trenches are separated by mesa regions each having a second width, and the first width is greater than the second width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.