Anamoly detection system for peripheral component interconnect express
US12034749B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2021 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Oct 8, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A traffic anomaly detector of a Peripheral Component Interconnect express (PCIe) system, including filters configured to filter headers of PCIe transaction layer packets (TLPs) based on respective filter criterion; a classifier configured to trigger an event based on one of the filter criterion or a logical combination of a plurality of the filter criteria; an event counter configured to count a number of the events; and a processor configured to detect, based on a value of the event counter, an anomaly in the PCIe TLP traffic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.