Semiconductor device structure with spacer
US12040237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2022 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | May 24, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a spacer over a side of the gate stack. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a first recess, the dielectric layer has an upper portion and a first lower portion, the upper portion is over the first recess, the first recess is between the first lower portion and the spacer, and the upper portion has a convex curved sidewall.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.