Methods of manufacturing semiconductor packages
US12040297B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2023 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Feb 9, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a redistribution structure including an insulating layer and a redistribution layer on the insulating layer, and having a first surface and a second surface opposing the first surface, and an under-bump metal (UBM) structure including an UBM pad protruding from the first surface of the redistribution structure, and an UBM via penetrating through the insulating layer and connecting the redistribution layer and the UBM pad. A lower surface of the UBM via has a first area in contact with the UBM pad, and a second area having a step configuration relative to the first area and that extends outwardly of the first area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.