Patent · US Active

High voltage extended-drain MOS (EDMOS) nanowire transistors

US12040395B2 · kind B2 · utility

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21Claims
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Key dates

Filing dateDec 13, 2019
Grant dateJul 16, 2024
Priority date
Expiry dateSep 13, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/159

Abstract

Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment a semiconductor device comprises a substrate, a source region over the substrate, a drain region over the substrate, and a semiconductor body extending from the source region to the drain region. In an embodiment, the semiconductor body has a first region with a first conductivity type and a second region with a second conductivity type. In an embodiment, the semiconductor device further comprises a gate structure over the first region of the semiconductor body, where the gate structure is closer to the source region than the drain region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.