Inventor · Hillsboro, OR, US

Tanuj Trivedi

12Patents

1h-index

14Co-inventors

40Inventor score

Filing activity: Dec 13, 2019 → Nov 15, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US11094782B1	Gate-all-around integrated circuit structures having depopulated channel structures	Electricity	2	Active
US11437483B2	Gate-all-around integrated circuit structures having dual nanoribbon channel structures	Electricity	1	Active
US11581404B2	Gate-all-around integrated circuit structures having depopulated channel structures	Electricity	0	Active
US11791380B2	Single gated 3D nanowire inverter for high density thick gate SOC applications	Electricity	0	Active
US12369358B2	Co-integrated high performance nanoribbon transistors with high voltage thick gate finFET devices	Electricity	0	Active
US12089411B2	Self-aligned front-end charge trap flash memory cell and capacitor design for integrated high-density scaled devices	Electricity	0	Active
US11862703B2	Gate-all-around integrated circuit structures having dual nanoribbon channel structures	Electricity	0	Active
US12249622B2	Nanoribbon thick gate devices with differential ribbon spacing and width for SOC applications	Electricity	0	Active
US11996403B2	ESD diode solution for nanoribbon architectures	Electricity	0	Active
US12349411B2	Gate-all-around integrated circuit structures having dual nanoribbon channel structures	Electricity	0	Active
US12317585B2	Adjacent gate-all-around integrated circuit structures having non-merged epitaxial source or drain regions	Electricity	0	Active
US12040395B2	High voltage extended-drain MOS (EDMOS) nanowire transistors	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.