Patent · US Active

Power supply circuit with reduced leakage current

US12047073B2 · kind B2 · utility

0Cited by

0References

25Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Pradeep Raj · Atrauli, IN
Rahul Sahu · Kanchinakote, IN
Sharad Gupta · New Delhi, IN
Chulmin Jung · Boise, US

Key dates

Filing date	Apr 29, 2021
Grant date	Jul 23, 2024
Priority date	—
Expiry date	Apr 29, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D30/50
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

Apparatuses and methods to reduce leakage current are presented. The includes a switch circuit configured to power a circuit block; a delay circuit configured to delay enabling the switch circuit powering the circuit block and to be powered down; and a bypass circuit configured to bypass the delay circuit to disable the switch circuit powering the circuit block. The method includes powering, by switch, a circuit block; powering down a delay circuit; and bypassing, by a bypass circuit, the delay circuit to disable the switch circuit powering the circuit block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.