Silicon carbide transistor device
US12062698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2020 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Sep 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon carbide transistor device includes a silicon carbide semiconductor and a silicon carbide epitaxial layer formed at a top surface of the substrate. A source structure is formed in a top surface of the silicon carbide epitaxial layer and includes a p-well region, a n-type source region and a p-type contact region. A source contact structure is formed over and electrically connected to a top surface of the source structure. A planar gate structure includes a gate dielectric and a gate runner adjacent a p-type channel region. The gate dielectric covers the channel region, at least part of the source structure and at least part of the source contact structure. The gate runner is electrically insulated from the channel region and the source structure and the source contact structure by the gate dielectric and overlaps the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.