Prediction processing system using reference data buffer to achieve parallel non-inter and inter prediction and associated prediction processing method
US12063360B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2022 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Aug 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/593
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A prediction processing system includes a processing circuit and a reference data buffer. The processing circuit performs a first inter prediction operation upon a first prediction block in a frame to generate a first inter prediction result, and further performs a second inter prediction operation upon a second prediction block during a first period. The reference data buffer buffers a reference data derived from the first inter prediction result. The processing circuit further fetches the reference data from the reference data buffer, and performs a non-inter prediction operation according to at least the reference data during a second period, wherein the second period overlaps the first period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.