Inventor · Hsinchu, TW

Kai-Chun Lin

31Patents
7h-index
25Co-inventors
65Inventor score

Filing activity: Sep 20, 2011 → Jul 29, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US9165629B2 Method and apparatus for MRAM sense reference trimming Physics 52 Active
US8687412B2 Reference cell configuration for sensing resistance states of MRAM bit cells Physics 31 Active
US8493776B1 MRAM with current-based self-referenced read operations Physics 16 Active
US8902641B2 Adjusting reference resistances in determining MRAM resistance states Physics 15 Active
US8509003B2 Read architecture for MRAM Physics 14 Active
US8923040B2 Accommodating balance of bit line and source line resistances in magnetoresistive random access memory Physics 11 Active
US8964458B2 Differential MRAM structure with relatively reversed magnetic tunnel junction elements enabling writing using same polarity current Physics 8 Active
US9406367B2 Method and apparatus for MRAM sense reference trimming Physics 7 Active
US9110829B2 MRAM smart bit write algorithm with error correction parity bits Physics 6 Active
US9747159B2 MRAM smart bit write algorithm with error correction parity bits Physics 2 Active
US8570792B2 Magnetoresistive random access memory Electricity 2 Active
US8842489B2 Fast-switching word line driver Physics 1 Active
US9368552B2 Resistive memory array and fabricating method thereof Electricity 1 Active
US9299677B2 Package with multiple plane I/O structure Electricity 1 Active
US8908439B2 Adaptive word-line boost driver Physics 1 Active
US9058872B2 Resistance-based random access memory Physics 1 Active
US10372948B2 Scrambling apparatus and method thereof Physics 1 Active
US11119416B2 Method for forming semiconductor structure and overlay error estimation Physics 1 Active
US10163980B2 Resistive memory array and fabricating method thereof Electricity 1 Active
US9413140B2 Semiconductor arrangement and formation thereof Electricity 1 Active
US9330746B2 Resistive memory array Physics 0 Active
US9711190B2 Stabilizing circuit Physics 0 Active
US9865601B2 Semiconductor integrated circuit Electricity 0 Active
US12063360B2 Prediction processing system using reference data buffer to achieve parallel non-inter and inter prediction and associated prediction processing method Electricity 0 Active
US10714535B2 Resistive memory array and fabricating method thereof Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.