Internal resource monitoring in memory devices
US12066914B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Sep 1, 2021 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Jun 1, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3476
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed for enabling a memory sub-system to perform firmware-based monitoring of system state information without adding latency to the memory sub-system. The memory sub-system controller can include multiple CPUs which can be employed to perform different tasks. The memory sub-system controller can employ one of the frontend CPUs as a monitoring CPU capable of executing a data-gathering task to retrieve system state information from another CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.