Method for executing atomic memory operations when contested
US12066941B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2022 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Oct 6, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Described are methods and a system for atomic memory operations with contended cache lines. A processing system includes at least two cores, each core having a local cache, and a lower level cache in communication with each local cache. One local cache configured to request a cache line to execute an atomic memory operation (AMO) instruction, receive the cache line via the lower level cache, receive a probe downgrade due to other local cache requesting the cache line prior to execution of the AMO, and send the AMO instruction to the lower level cache for remote execution in response to the probe downgrade.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.