Method for forming semiconductor structure
US12068163B2 · kind B2 · utility
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2References
19Claims
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Key dates
| Filing date | Oct 25, 2021 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Aug 19, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure in provided. The method includes providing a substrate, forming a gate electrode layer on the substrate, and performing a defluorination treatment on the gate electrode layer. The method also includes, after performing the defluorination treatment, forming a barrier layer on a portion of a surface of the gate electrode layer. The barrier layer is made of a material including titanium element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.