Inventor · Shanghai, CN

Xiang Hu

60Patents
5h-index
103Co-inventors
75Inventor score

Filing activity: Mar 24, 2004 → Apr 1, 2025

Most-cited inventions

PatentTitleAreaCited byStatus
USD500566S1 Portions of a flashlight General 10 Expired
US9735154B2 Semiconductor structure having gap fill dielectric layer disposed between fins Electricity 9 Active
US9105478B2 Devices and methods of forming fins at tight fin pitches Electricity 8 Active
US10592555B1 Intelligent customer services based on a vector propagation on a click graph model Physics 7 Active
US7879732B2 Thin film etching method and semiconductor device fabrication using same Electricity 6 Active
US9040380B2 Integrated circuits having laterally confined epitaxial material overlying fin structures and methods for fabricating same Electricity 5 Active
US8907496B1 Circuit structures and methods of fabrication with enhanced contact via electrical connection Electricity 4 Active
US9224842B2 Patterning multiple, dense features in a semiconductor device using a memorization layer Electricity 4 Active
US9121890B2 Planar metrology pad adjacent a set of fins of a fin field effect transistor device Electricity 4 Active
US9490129B2 Integrated circuits having improved gate structures and methods for fabricating same Electricity 4 Active
US8916472B2 Interconnect formation using a sidewall mask layer Electricity 4 Active
US9305785B2 Semiconductor contacts and methods of fabrication Electricity 3 Active
US8877642B2 Double-pattern gate formation processing with critical dimension control Electricity 2 Active
US9129905B2 Planar metrology pad adjacent a set of fins of a fin field effect transistor device Electricity 2 Active
US9817927B2 Hard mask etch and dielectric etch aware overlap for via and metal layers Physics 2 Active
US9305832B2 Dimension-controlled via formation processing Electricity 2 Active
US10181420B2 Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias Electricity 2 Active
US9520395B2 FinFET devices comprising a dielectric layer/CMP stop layer/hardmask/etch stop layer/gap-fill material stack Electricity 2 Active
US9666476B2 Dimension-controlled via formation processing Electricity 2 Active
US9275906B2 Method for increasing a surface area of epitaxial structures in a mixed N/P type fin semiconductor structure by forming multiple epitaxial heads Electricity 1 Active
US8835292B2 Method of manufacturing semiconductor devices including replacement metal gate process incorporating a conductive dummy gate layer Electricity 1 Active
US9196499B2 Method of forming semiconductor fins Electricity 1 Active
US7718987B2 Electrically writable and erasable memory medium having a data element with two or more multiple-layer structures made of individual layers Electricity 1 Expired
US11115801B2 Traffic offloading method and related device in roaming scenario Electricity 1 Active
US11688798B2 Semiconductor structure and fabrication method thereof Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.