Patent · US Active

Input stage for a sample analog to digital converter, sample analog to digital converter and procedure for testing an analog to digital converter

US12068754B2 · kind B2 · utility

0Cited by

4References

19Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Florian Renneke · Munster, DE
Andreas Fugger · Villach, AT
Jaafar Mejri · Ottobrunn, DE

Key dates

Filing date	Jul 26, 2022
Grant date	Aug 20, 2024
Priority date	—
Expiry date	Oct 17, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/466
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An input stage for an analog/digital converter, an analog/digital converter and a method for testing analog/digital converters with successive approximation are disclosed. At an input stage, an input signal is supplied via a first transistor arrangement of a sampling capacitor arrangement. The sampling capacitor arrangement can be optionally connected to ground or to a reference voltage by way of a second transistor arrangement and a switch apparatus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.