Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options

US12074607B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Narasimhan Rajagopal · Bengaluru, IN
• Nithin Gopinath · Kanchinakote, IN
• Viswanathan Nagarajan · Bengaluru, IN
• Neeraj Shrivastava · Bengaluru, IN
• Visvesvaraya Pentakota · Bengaluru, IN
• Harshit Moondra · Mumbai, IN
• Abhinav CHANDRA · Bengaluru, IN

Key dates

• Filing date: May 26, 2022
• Grant date: Aug 27, 2024
• Expiry date: Sep 10, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M1/12
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.