Branch target buffer with shared target bits
US12086600B2 · kind B2 · utility
0Cited by
7References
18Claims
0Family size
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Key dates
| Filing date | Dec 5, 2022 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Dec 5, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3806
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure include techniques for branch prediction. A branch predictor may be included in a front end of a processor. The branch predictor may store branch targets in a branch target buffer. The branch target buffer includes shared bits, which may be combined with branch target bits to specify branch target destination addresses. Shared bits may result in more efficient memory usage in the processor, for example.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.