Patent · US Active

Selectable monolithic or external scalable die-to-die interconnection system methodology

US12087689B2 · kind B2 · utility

1Cited by

9References

16Claims

0Family size

Assignee

Apple Inc. · US

Inventors

Sanjay Dabral · Palo Alto, US
Jun Zhai · Cupertino, US
Jung-Cheng Yeh · San Jose, US
Kunzhong Hu · Cupertino, US
Raymundo M. Camenforte · San Jose, US
Thomas Hoffmann · Münstermaifeld, DE

Key dates

Filing date	Oct 17, 2023
Grant date	Sep 10, 2024
Priority date	—
Expiry date	Oct 17, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2225/06586
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Multi-die structures and methods of fabrication are described. In an embodiment, a multi-die structure includes a first die, a second die, and die-to-die routing connecting the first die to the second die. The die-to-die interconnection may be monolithically integrated as a chip-level die-to-die routing, or external package-level die-to-die routing.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.