Chip protected against back-face attacks
US12087708B2 · kind B2 · utility
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2References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Oct 21, 2021 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | May 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/293
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor chip includes forming a plurality of conducting pads at a front face of a substrate, thinning a rear face of the substrate, etching openings under each conducting pad from the rear face, depositing a layer of a dielectric on walls and a bottom of the openings, forming a conducting material in the openings, and forming a conducting strip on the rear face. The conducting strip is electrically connected to the conducting material of each of the openings. The etching is stopped when the respective conducting pad is reached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.