Wafer stage and method of using
US12092958B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Jun 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0274
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A wafer stage includes an area for receiving a wafer. The wafer stage further includes a first sensor outside of the area for receiving the wafer. The wafer stage further includes a second sensor outside of the area of receiving the wafer, wherein the second sensor is spaced from the first sensor. The wafer stage further includes a first particle capture area outside of the area for receiving the wafer, wherein the first particle capture area is spaced from both the first sensor and the second sensor, a dimension of the first particle capture area in a first direction parallel to a top surface of the wafer stage is at least 26 millimeters (mm), a dimension of the first particle capture area in a second direction parallel to the top surface of the wafer stage is at least 33 mm, and the second direction is perpendicular to the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.