Multibit shift instruction
US12093688B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Nov 17, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30123
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An article of manufacture includes a non-transitory machine-readable medium. The medium includes instructions that cause a processor to execute a shift instruction. The shift instruction is to cause a source data in memory to be shifted left or shifted right. The shift instruction is to include a source parameter and a bit size parameter. The processor is to execute the shift instruction through a shift of a first source word of the source data by the bit size parameter to yield a first intermediate word, a shift of a second source word of the source data by the bit size parameter to yield a second intermediate word and a first set of shifted-out bits, and through execution of a logical OR operation on the first intermediate word and the first set of shifted-out bits to yield a first result word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.