Method for forming a trench in a first semiconductor layer of a multi-layer system

US12094717B2 · kind B2 · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Christof Schwenk · Glatten, DE
• Nicolas Schorr · Reutlingen, DE

Key dates

• Filing date: Jan 12, 2022
• Grant date: Sep 17, 2024
• Expiry date: Apr 17, 2043

Classification

• Technology area (CPC B): Performing Operations; Transporting
• CPC primary: B81C2201/0198
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming a trench in a first semiconductor layer of a multi-layer system. The method includes: applying a mask layer onto the first semiconductor layer, a recess being formed in the mask layer so that the first semiconductor layer is exposed within the recess; applying a protective layer which completely covers or modifies the first semiconductor layer exposed within the recess; applying a second semiconductor layer; etching the second semiconductor layer to completely remove it in a subarea surrounding the recess of the mask layer; etching the protective layer so that the first semiconductor layer is exposed within the recess; and forming the trench in the first semiconductor layer, the recess of the mask layer serving as an etching mask, and the trench being formed by a cyclical alternation between etching and passivation steps, the first etching step being longer than the subsequent etching steps.