Hierarchical ring-based interconnection network for symmetric multiprocessors
US12099463B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2022 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Dec 30, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L41/0893
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A symmetric multiprocessor includes with a hierarchical ring-based interconnection network is disclosed. The symmetric processor includes a plurality of buses comprised on the symmetric multiprocessor, wherein each of the buses are configured in a circular topology. The symmetric multiprocessor also includes a plurality of multi-processing nodes interconnected by the buses to make a hierarchical ring-based interconnection network for conveying commands between the multi-processing nodes. The interconnection network includes a command network configured to transport commands based on command tokens, wherein the tokens dictate a destination of the command, a partial response network configured to transport partial responses generated by the multi-processing nodes, and a combined response network configured to combine the partial responses generated by the multi-processing nodes using combined response tokens.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.