Power-forwarding bridge for inter-chip data signal transfer
US12100662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2020 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Jan 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/18
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) package, comprising a substrate that comprises a bridge die embedded within a dielectric. A first die comprising a first input/output (I/O) transmitter and a second die comprising a second I/O receiver and electrically coupled to the bridge die. A first signal trace and a first power conductor are within the bridge die. The first signal trace and the first power conductor are electrically coupled to the first I/O transmitter and the second I/O receiver. The first signal trace is to carry a digital signal and the first power conductor to provide a voltage for the second I/O receiver to read the digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.