Memory cell
US12100752B2 · kind B2 · utility
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0References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 14, 2021 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Jan 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B99/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cell includes a Z2-FET-type structure that is formed with two front gates extending over an intermediate region between an anode region and a cathode region. The individual front gates of the two front gates are spaced apart by a distance that is shorter than 40% of a width of each individual front gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.