High performance architecture for converged security systems and appliances
US12101356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2022 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Nov 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/1546
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In some aspects, the disclosure is directed to methods and systems for providing an architecture for building high performance silicon components that support a rich set of networking and security features. In many implementations, the architecture splits network and security functions into two functional and logical blocks (which may physically be on the same die or integrated circuit in some implementations, or may be split on separate integrated circuits). The network functions may be executed via an integrated network interface card and accelerator subsystem with a high throughput execution pipeline. Security functions may be executed asynchronously from the network processing functions, in many implementations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.