Mark Birman
19Patents
10h-index
23Co-inventors
72Inventor score
Filing activity: Mar 14, 1988 → Jan 31, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7643353B1 | Content addressable memory having programmable interconnect structure | Physics | 54 | Active |
| US5021985A | Variable latency method and apparatus for floating-point coprocessor | Physics | 45 | Expired |
| US7660140B1 | Content addresable memory having selectively interconnected counter circuits | Physics | 40 | Active |
| US4901267A | Floating point circuit with configurable number of multiplier cycles and variable divide cycle ratio | Physics | 29 | Expired |
| US7916510B1 | Reformulating regular expressions into architecture-dependent bit groups | Physics | 25 | Active |
| US7826242B2 | Content addresable memory having selectively interconnected counter circuits | Physics | 15 | Active |
| US7881125B2 | Power reduction in a content addressable memory having programmable interconnect structure | Physics | 14 | Active |
| US7787275B1 | Content addressable memory having programmable combinational logic circuits | Physics | 14 | Active |
| US7876590B2 | Content addressable memory having selectively interconnected rows of counter circuits | Physics | 13 | Active |
| US7924590B1 | Compiling regular expressions for programmable content addressable memory devices | Physics | 12 | Active |
| US7821844B2 | Content addresable memory having programmable interconnect structure | Physics | 10 | Active |
| US7461200B1 | Method and apparatus for overlaying flat and tree based data sets onto content addressable memory (CAM) device | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7836246B2 | Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (CAM) device | Emerging Cross-Sectional Technologies | 5 | Active |
| US8812480B1 | Targeted search system with de-obfuscating functionality | Electricity | 5 | Active |
| US8214305B1 | Pattern matching system and method for data streams, including deep packet inspection | Physics | 4 | Active |
| US8631195B1 | Content addressable memory having selectively interconnected shift register circuits | Physics | 1 | Active |
| US9269411B2 | Organizing data in a hybrid memory for search operations | Physics | 0 | Active |
| US12101356B2 | High performance architecture for converged security systems and appliances | Electricity | 0 | Active |
| US12259827B2 | Systems and methods for address scrambling | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.