Adaptive out of order arbitration for numerous virtual queues
US12105646B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 1, 2021 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Jun 10, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a memory implementing one or more virtual queues and a processor coupled to the memory. In response to issuing one or more requests for data, a processor maps one or more of the requests for data to a return queue structure. The processor then allocates one or more virtual queues to the return queue structure based on the mapped requests. In response to allocating the virtual queues to the return queue, the processor writes the data indicated in the mapped requests to the allotted virtual queues and enables the return queue for arbitration. When the return queue is enabled for arbitration, the processor reads out the data written to the allocated virtual queues, processes the read out data, and provides the processed data to a processing pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.