Semiconductor chip and semiconductor package including same
US12107034B2 · kind B2 · utility
0Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2021 |
| Grant date | Oct 1, 2024 |
| Priority date | — |
| Expiry date | Nov 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip may include; a device layer including transistors on a substrate, a wiring layer on the device layer, a first through via passing through the device layer and the substrate, and a second through via passing through the wiring layer, the device layer and the substrate, wherein a first height of the first through via is less than a second height of the second through via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.