Techniques for firmware enhancement in memory devices
US12112066B2 · kind B2 · utility
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2References
25Claims
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Key dates
| Filing date | Jul 14, 2022 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jul 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for techniques for firmware enhancement in memory devices are described. A memory system may include a volatile memory device and a non-volatile memory device, which may store a node address mapping. A host system in communication with the memory system may transmit a command instructing the memory system to transfer at least a portion of the node address mapping from the non-volatile memory device to the volatile memory device. The memory system may transmit a response to the command to the host system indicating a status associated with transferring the portion of the node address mapping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.