Memory circuit and word line driver
US12112796B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 17, 2022 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Sep 8, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4096
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a memory circuit. The memory circuit includes: a plurality of word lines, a word line driver, and a first conductive line. The word line driver is electrically connected to the word lines. The word line driver includes: a plurality of first electronic components and a plurality of second electronic components. The plurality of first electronic components each electrically connected to the corresponding word line. The plurality of second electronic components each having a first terminal and a second terminal. The first terminal is electrically connected to the corresponding word line and the corresponding first electronic component. The first conductive line is electrically connected to the second terminal of the second electronic components. The first conductive line has a length proportional to the number of the word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.