Wei-jer Hsieh
24Patents
3h-index
23Co-inventors
59Inventor score
Filing activity: Jun 9, 2011 → Jul 16, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9070432B2 | Negative bitline boost scheme for SRAM write-assist | Physics | 22 | Active |
| US9437281B2 | Negative bitline boost scheme for SRAM write-assist | Physics | 19 | Active |
| US9208857B2 | SRAM multiplexing apparatus | Physics | 3 | Active |
| US10281502B2 | Maximum voltage selection circuit | Physics | 2 | Active |
| US10878855B1 | Low cell voltage (LCV) memory write assist | Electricity | 2 | Active |
| US8750053B2 | SRAM multiplexing apparatus | Physics | 1 | Active |
| US12112796B2 | Memory circuit and word line driver | Physics | 1 | Active |
| US11913980B2 | Power detection circuit | Electricity | 1 | Active |
| US11598794B2 | Power detection circuit | Electricity | 1 | Active |
| US11087833B2 | Power management circuit in memory device | Physics | 1 | Active |
| US12119040B2 | Memory power control by enable circuit | Physics | 0 | Active |
| US11915746B2 | Memory device with word line pulse recovery | Physics | 0 | Active |
| US11727972B2 | SRAM with tracking circuitry for reducing active power | Physics | 0 | Active |
| US12298331B2 | Power detection circuit | Electricity | 0 | Active |
| US12431191B2 | Memory circuit and word line driver | Physics | 0 | Active |
| US9025356B2 | Fly-over conductor segments in integrated circuits with successive load devices along a signal path | Physics | 0 | Active |
| US9076553B2 | SPSRAM wrapper | Physics | 0 | Active |
| US12211587B2 | SRAM with tracking circuitry for reducing active power | Physics | 0 | Active |
| US11373702B2 | Boost schemes for write assist | Physics | 0 | Active |
| US10263621B2 | Level shifter with improved voltage difference | Electricity | 0 | Active |
| US11355183B2 | Memory device with word line pulse recovery | Physics | 0 | Active |
| US9324453B2 | Memory unit and method of testing the same | Physics | 0 | Active |
| US12380945B2 | Memory device with word line pulse recovery | Physics | 0 | Active |
| US12125525B2 | Memory device and method of operating the same | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.