High voltage stacked transistor amplifier
US12113484B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Mar 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21142
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various aspects of integrated amplifiers, layouts for the integrated amplifiers, and packaged arrangements of the amplifiers are described. In one example, an amplifier includes an amplifier cell, and a biasing network coupled to the common gate transistor in the amplifier cell. The amplifier cell includes a common source transistor and a common gate transistor in a cascode arrangement, where at least one of the common source transistor and the common gate transistor comprises a field plate. Among other advantages, the amplifiers described herein can be biased with relatively high voltages and still operate like a single a common source transistor, without sacrificing reliability, performance, or requiring additional off-chip components, such as biasing networks of resistors and inductors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.