Techniques for supporting large frame buffer apertures with better system compatibility
US12117933B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Dec 9, 2020 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for accessing accelerated processing device (“APD”) memory is provided. The technique includes identifying whether to activate one or both of a first direct mapping unit and a second direct mapping unit, wherein the first direct mapping unit is associated with a small address size and the second direct mapping unit is associated with a large address size; activating the identified one or both of the first direct mapping unit and the second direct mapping unit; and accessing memory of the accelerated processing device using the one or both of the first direct mapping unit and the second direct mapping unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.