Transistor circuits with shielded reference transistors
US12119300B2 · kind B2 · utility
0Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2022 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Apr 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/82
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device having a reference transistor fabricated within the same semiconductor substrate as a primary transistor (e.g., configured for use in a radiofrequency amplifier or other active circuit) has a shared metallization area coupled to a current terminal of both transistors configured to shield a control terminal of the reference transistor from coupling of alternating current interference from alternating currents within the primary transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.