Punch through stopper in bulk finFET device
US12119393B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2022 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Jun 23, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device that includes forming a fin structure from a bulk semiconductor substrate and forming an isolation region contacting a lower portion of a sidewall of the fin structure, wherein an upper portion of the sidewall of the fin structure is exposed. A sacrificial spacer is formed on the upper portion of the sidewall of the fin structure. The isolation regions are recessed to provide an exposed section of the sidewall of the fin structure. A doped semiconductor material is formed on the exposed section of the lower portion of the sidewall of the fin structure. Dopant is diffused from the doped semiconductor material to a base portion of the fin structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.