Semiconductor transistor device and method of manufacturing the same

US12119400B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Robert Haase · Rancho Palos Verdes, US
• Jyotshna Bhandari · Villach, AT
• Heimo Hofer · Bodensdorf, AT
• Ling Ma · Huizhou, CN
• Ashita Mirchandani · El Segundo, US
• Harsh Naik · El Segundo, US
• Martin Poelzl · Ossiach, AT
• Martin Vielemeyer · Villach, AT
• Britta Wutte · Fürstenfeld, AT

Key dates

• Filing date: Apr 6, 2022
• Grant date: Oct 15, 2024
• Expiry date: Jul 23, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/671

Abstract

A method for manufacturing a semiconductor transistor device includes etching a vertical gate trench into a silicon region, depositing a silicon gate material on an interlayer dielectric formed in the vertical gate trench so that an upper side of the interlayer dielectric is covered, etching through the silicon gate material in the vertical gate trench to partly uncover the upper side of the interlayer dielectric and so that a silicon gate region of a gate electrode of the semiconductor transistor device remains in the vertical gate trench, and depositing a metal material into the vertical gate trench so that the partly uncovered upper side of the interlayer dielectric is covered by the metal material.