Semiconductor device and electronic system including the same
US12120882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2021 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Apr 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
A semiconductor device includes a lower structure including a peripheral circuit; a stack structure on the lower structure, extending from a memory cell array region to a stepped region, and including a gate stacked region, and an insulator stacked regions arranged in the stepped region in a first direction; a capping insulating structure on the stack structure; and separation structures passing through the gate stacked region. The stack structure includes interlayer insulating layers and horizontal layers, alternately and repeatedly stacked, the horizontal layers include gate horizontal layers and insulating horizontal layers, the gate stacked region includes the gate horizontal layers, each of the insulator stacked regions includes the insulating horizontal layers, in the stepped region, the stack structure includes a first stepped region, a connection stepped region, and a second stepped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.