Processing device for handling misaligned data
US12124699B2 · kind B2 · utility
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26Claims
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Key dates
| Filing date | Nov 9, 2022 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Apr 13, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30109
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A new type of instruction and a control register for the new type of instruction are provided to handle data that may be misaligned in memory. A first part of data (which may be misaligned in memory) is loaded into a first set of registers by loading a first atom containing the first part of data into registers. The pack instruction is executed by an execution unit to place part of data (whose length and starting position are indicated by second and third values in a control register) from one set of registers into an identified location (identified by a first value in the control register) in another set of registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.