Peter Hedinger
10Patents
5h-index
7Co-inventors
59Inventor score
Filing activity: Jan 29, 2002 → Nov 9, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6959363B2 | Cache memory operation | Physics | 9 | Expired |
| US7617386B2 | Scheduling thread upon ready signal set when port transfers data on trigger time activation | Physics | 7 | Active |
| US8347312B2 | Thread communications | Physics | 6 | Active |
| US6883067B2 | Evaluation and optimization of code | Physics | 6 | Expired |
| US8966488B2 | Synchronising groups of threads with dedicated hardware logic | Physics | 5 | Active |
| US7062634B1 | Processor and a method for handling and encoding no-operation instructions | Physics | 5 | Expired |
| US7613909B2 | Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processor | Emerging Cross-Sectional Technologies | 3 | Active |
| US7216342B2 | Code generation | Physics | 1 | Expired |
| US11256516B2 | Processing system with a main processor pipeline and a co-processor pipeline | Physics | 0 | Active |
| US12124699B2 | Processing device for handling misaligned data | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.