Memory device and method of operating the same
US12125525B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2022 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Nov 10, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/418
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device and a method of operating the memory device are disclosed. In one aspect, the memory device includes a word line driver connected to a word line, a row of memory cells connected to the word line, each memory cell powered by a first supply voltage, and a power circuit. The power circuit is configured to provide the first supply voltage to the word line driver when a read condition is satisfied, and a second supply voltage to the word line driver when the read condition is not satisfied, the second supply voltage being less than the first supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.