Semiconductor memory device
US12125545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2022 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Jan 28, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a driver that, in a write operation, applies a first voltage to a first select gate line, applies a second voltage lower than the first voltage to a second select gate line, applies a third voltage equal to or higher than the first voltage to a first dummy word line on an uppermost layer, applies a fourth voltage different from the third voltage and higher than the second voltage to a second dummy word line on an uppermost layer, applies a fifth voltage equal to or higher than the third voltage to a first dummy word line on a lowermost layer, and applies a sixth voltage different from the fifth voltage and equal to or higher than the fourth voltage to a second dummy word line on a lowermost layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.