Independent set data lanes for IOD SSD
US12131072B2 · kind B2 · utility
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2References
20Claims
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Key dates
| Filing date | Jul 17, 2023 |
| Grant date | Oct 29, 2024 |
| Priority date | — |
| Expiry date | Jul 17, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein relate to systems and methods for enabling a data lane for communicating messages for each of a plurality of regions of a non-volatile memory. Each of the plurality of regions includes a plurality of dies. The messages for each of the plurality of regions are communicated via the data lane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.