Amit Jain
32Patents
4h-index
43Co-inventors
59Inventor score
Filing activity: Oct 18, 2004 → Jul 17, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7441121B2 | Device certificate self-individualization | Electricity | 24 | Active |
| US7558463B2 | Retention of information about digital-media rights in transformed digital media content | Physics | 16 | Active |
| US10585825B2 | Procedures for implementing source based routing within an interconnect fabric on a system on chip | Electricity | 7 | Active |
| US8438645B2 | Secure clock with grace periods | Physics | 5 | Active |
| US9703579B2 | Debug environment for a multi user hardware assisted verification system | Physics | 4 | Active |
| US11294594B2 | SSD architecture supporting low latency operation | Physics | 3 | Active |
| US12155731B2 | Platform-as-a-service deployment including service domains | Electricity | 3 | Active |
| US11003604B2 | Procedures for improving efficiency of an interconnect fabric on a system on chip | Electricity | 3 | Active |
| US8347078B2 | Device certificate individualization | Electricity | 3 | Active |
| US9336359B2 | Device certificate individualization | Electricity | 3 | Active |
| US10853282B2 | Arbitrating portions of transactions over virtual channels associated with an interconnect | Electricity | 3 | Active |
| US10838891B2 | Arbitrating portions of transactions over virtual channels associated with an interconnect | Electricity | 3 | Active |
| US11340671B2 | Protocol level control for system on a chip (SOC) agent reset and power management | Emerging Cross-Sectional Technologies | 2 | Active |
| US11640362B2 | Procedures for improving efficiency of an interconnect fabric on a system on chip | Electricity | 1 | Active |
| US9946823B2 | Dynamic control of design clock generation in emulation | Physics | 1 | Active |
| US10824412B2 | Method and apparatus for data driven and cluster specific version/update control | Physics | 1 | Active |
| US11836042B2 | Payload distribution in solid state drives | Physics | 0 | Active |
| US11526397B2 | Payload distribution in solid state drives | Physics | 0 | Active |
| US12131072B2 | Independent set data lanes for IOD SSD | Physics | 0 | Active |
| US9165099B2 | Adaptive clock management in emulation | Physics | 0 | Active |
| US10917323B2 | System and method for managing a remote office branch office location in a virtualized environment | Physics | 0 | Active |
| US11561870B2 | SSD with compressed superblock mapping table | Emerging Cross-Sectional Technologies | 0 | Active |
| US11693773B2 | Systems and methods for implementing a four-dimensional superblock | Physics | 0 | Active |
| US11249648B2 | Transfer and processing unit for IOD SSD | Physics | 0 | Active |
| US11144392B1 | Payload distribution in solid state drives | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.