Patent · US Active

Buffer management in an ethernet switch

US12135899B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Longli Yu · Taufkirchen, DE
Manuela Meier · Munich, DE

Key dates

Filing date	Jan 25, 2022
Grant date	Nov 5, 2024
Priority date	—
Expiry date	Jul 25, 2042

Classification

Technology area (CPC H)Electricity
CPC primaryH04L49/901
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A device may include a buffer memory to buffer frames received or to be transmitted via a plurality of ports of the device. The device may include at least one frame processor to process frames. The device may include a buffer manager to store a frame in the buffer memory. The buffer manager may allocate at least one buffer control block (BCB) to the frame based on storing the frame in the buffer memory. The buffer manager may allocate a frame control block (FCB) to the frame. The FCB may include information that identifies the at least one BCB. The buffer manager may perform one or more queueing operations in association with processing of the frame by the at least one frame processor. The one or more queuing operations may be performed using information associated with the FCB.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.