Patent · US Active

Method of training a logistic regression classifier with a resistive random access memory

US12136022B2 · kind B2 · utility

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Key dates

Filing dateNov 17, 2020
Grant dateNov 5, 2024
Priority date
Expiry dateFeb 10, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2013/0045
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for training a logistic regression classifier on a dataset by using a resistive RAM as hardware accelerator, each row of the resistive RAM including cells which can be programmed in a first resistance state or a second resistance state. The probability of a data element belonging to a class is modelled by a logistic function applied to a score of the element, where is a parameter vector of the model. The logistic regression classifier is trained by populating the resistive RAM with samples of a model parameter vector which are obtained by MCMC sampling. Once populated, the resistive RAM can be used for classifying new data.

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