Forming passivation stack having etch stop layer
US12142481B2 · kind B2 · utility
0Cited by
9References
24Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 5, 2022 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Jan 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/02215
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one aspect, a method includes depositing a first glass layer on a metallization layer and depositing an etch stop layer on the first glass layer. The method further includes depositing a second glass layer on the etch stop layer and polishing the second glass layer down to at least a surface of the etch stop layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.