Backside power distribution network semiconductor package and method of manufacturing the same
US12142564B2 · kind B2 · utility
0Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2023 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Aug 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/05176
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor architecture including a carrier substrate, a landing pad included in the carrier substrate, a first semiconductor device provided on a first surface of the carrier substrate, the first semiconductor device including a first component provided on the landing pad, and a second semiconductor device provided on a second surface of the carrier substrate, a second component protruding from the second semiconductor device being provided on the landing pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.