Patent · US Active

Fan-out package structure and method for manufacturing the same

US12148681B2 · kind B2 · utility

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19Claims
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Key dates

Filing dateNov 20, 2021
Grant dateNov 19, 2024
Priority date
Expiry dateDec 24, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2224/18
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention provides a fan-out package structure and a method for manufacturing the same. The fan-out package structure includes at least one chip and at least one redistribution layer on a functional surface side of the chip, and the redistribution layer includes a dielectric layer and a metal wiring layer distributed within the dielectric layer. The fan-out package structure further includes at least one dummy wafer on the redistribution layer, and the dummy wafer is insulated from the chip and in contact with the metal wiring layer. By providing the dummy wafer on the redistribution layer and configuring the dummy wafer to connect to the metal wiring layer, the dummy wafer can not only function to support the structure and suppress the warpage, but also form a continuous heat dissipation channel, thereby improving thermal management capability of the fan-out package structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.