High voltage semiconductor device comprising a combined junction terminal protection structure with a ferroelectric material
US12148793B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2023 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Nov 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
The present invention provides a high voltage semiconductor device comprising a combined junction terminal protection structure, the device comprises: an active area formed with the high voltage semiconductor device; a combined junction terminal protection structure having a RESURF (Reduced Surface Field) structure, the RESURF structure comprising a first biasing field plate electrically connecting to the active area and a ferroelectric material layer positioned below the first biasing field plate and in contact with the first biasing field plate. The high voltage semiconductor device structure may further assist in raising breakdown voltage (BV) of the device and meanwhile effectively reduce on-resistance (Ron) of the device compared with current junction terminal protection structure, and then miniaturization of the device structure may be fulfilled more easily. Further, the process may be performed easily because only common deposition and patterning processes of Hf-oxide ferroelectric layer should be added to current process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.